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| <pending_commit branch="chromeos-2016.05" change_id="Iec7cfe5eaaef2a3cc9cac7553695b730ade87493" commit="02b3a3187434664a4d4f80574d6de2f4634aa3ab" commit_message="UPSTREAM: flapjack: use sku_id 0 for un-provisioned board Instead of using 2, 0 is now used for non-CBI provisioned board or corrupted CBI board to confrom to the sku encoding. BUG=b:123676982 BRANCH=kukui TEST=test with un-provisioned board to verify the sku_id. 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BUG=none BRANCH=none TEST=none Change-Id: Iea7479b4060da376f515e77858c879f2f168ba60 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: ba8af5807c83244c947571caa7f3c488f4e581a1 Original-Change-Id: I2e882a560dd0a1e96d6e1405735c6f7389c0db5a Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/31638 Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496816 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496816" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/16/1496816/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I852e1a41c6070d836f630841f8491f74912e1482" commit="71ddc044d8e68a52758794c27faea92564d73264" commit_message="UPSTREAM: soc/intel/cannonlake: Add PCH series check for CML LP PCH TEST=Verify PM_STS1 value is is not 0xFF. Change-Id: I852e1a41c6070d836f630841f8491f74912e1482 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: db9e9ac30d12ac4fa548c01b907193503a5ae421 Original-Change-Id: I932585f6e7525830bd57ecfc372bf3120e7cca66 Original-Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/31434 Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496817 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496817" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/17/1496817/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I3148398e40a23266f665c86a47bacc0b8b7a6ca1" commit="0c49b407784160d47373cd92ff1bee81c014ae67" commit_message="UPSTREAM: intel/spi: Fix use of __SIMPLE_DEVICE__ Fix cases of using ENV_SMM where __SIMPLE_DEVICE__ should be used instead. BUG=none BRANCH=none TEST=none Change-Id: I3148398e40a23266f665c86a47bacc0b8b7a6ca1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 17387f67ad0d286332e4c498de08354a37e61fdb Original-Change-Id: I385c82767a87ff7a47466a200488fae9fc8b863d Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/31629 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1496818 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496818" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/18/1496818/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I481e481bc5e32cf7afdc68ce2902e30d046f0c07" commit="a57cbebcfe71b47205c2656131eef7f919986ff8" commit_message="UPSTREAM: intel/spi: Switch to native PCI config accessors BUG=none BRANCH=none TEST=none Change-Id: I481e481bc5e32cf7afdc68ce2902e30d046f0c07 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 7ba14406c30f90cebde9f539f1987348cfc998e4 Original-Change-Id: If7190ac105b2a65a9576709955c3cc840b95dcdf Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/31270 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1496819 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496819" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/19/1496819/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic20c96d21c701f9f8fab32a2f5817cf561348311" commit="b38871db47108c3feba0489b54a3a1881af65094" commit_message="UPSTREAM: mb/intel/saddlebrook: Fix 2nd DIMM slot Assumed broken during review and rebase. The SPD at address 0x52 will appear at index 1. BUG=none BRANCH=none TEST=none Change-Id: Ic20c96d21c701f9f8fab32a2f5817cf561348311 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 035876c4ddb0c9cb92b867bc329f74f1021bf0f7 Original-Change-Id: I213853d2b981294554d8d1b254da476905a41c13 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/31630 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh@intel.com> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1496820 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496820" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/20/1496820/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I8ed28727a50aac69a232cf40d3dff31ce833e01f" commit="b220e918944d5f20b05fb38cf505ffef99f5dc0d" commit_message="UPSTREAM: vendorcode/intel/fsp/fsp2_0/cml: Add FSP header files for Cometlake Adding header files for FSP for cometlake platform version 1034 BUG=none BRANCH=none TEST=none Change-Id: I8ed28727a50aac69a232cf40d3dff31ce833e01f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 7bdae06170dffb86676b8f67df91614d8896149a Original-Change-Id: I734316445dda5b1feb4098ce3c58b6dd8ce2d272 Original-Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/31529 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1496821 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496821" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/21/1496821/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2b1351bba914b7d9eea1527b14455e1dab899f7e" commit="5484ad37ef9c5668d9544f34ce3936ebb930a3ea" commit_message="UPSTREAM: mediatek/mt8183: Add RTC support This patch implements RTC initialization. 1. initialization dcxo 2. rtc clock using dcxo 32k 3. export RTC_32K1V8_0 to SOC, export RTC_32K1V8_1 to WLAN 4. rtc register initialization 5. refactor the driver common part BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: I2b1351bba914b7d9eea1527b14455e1dab899f7e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 47d46d0a18af3ec140c07b8e3a88dd3fb53c331e Original-Change-Id: Icccb9360a507fcbfd865b107cd3630e71c810d55 Original-Signed-off-by: Ran Bi <ran.bi@mediatek.com> Original-Reviewed-on: https://review.coreboot.org/c/31046 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496822 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496822" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/22/1496822/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5013724519df58103ba11cee81e4ba8a554b3e34" commit="c7f2c1b5d694b450b7122e497653635a3bd9caf6" commit_message="UPSTREAM: google/kukui: Add RTC initialization Initialize RTC at ROM stage. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: I5013724519df58103ba11cee81e4ba8a554b3e34 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a198c9d732e1eedd801952108823a5a94ede2839 Original-Change-Id: I9d9c68755e8a6ac65dd794211e6ccf06e5057567 Original-Signed-off-by: Ran Bi <ran.bi@mediatek.com> Original-Reviewed-on: https://review.coreboot.org/c/31508 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496823 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496823" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/23/1496823/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2c71a031512324ccc7f5ceaff7ee08113a3dca3d" commit="c50e0e02f16b8526ad72519d683397bee75897f0" commit_message="UPSTREAM: soc/intel/cannonlake: Disable ACPI mode on BS_DEV_INIT exit Change ac8c60e (soc/intel/cannonlake: Disable ACPI mode as part of pmc_soc_init) moved disabling of ACPI mode to pmc_soc_init to keep it more aligned with the behavior on other Intel SoCs. However, as the PMC device is hidden, it never gets enumerated and so init function does not get called for it. This change moves the call to disable ACPI mode to exit of BS_DEV_INIT instead. BUG=b:126016602 TEST=Verified that: 1. pmc_set_acpi_mode is actually getting called. 2. EC panic event gets logged to eventlog correctly. Change-Id: I2c71a031512324ccc7f5ceaff7ee08113a3dca3d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 67a489fdb058acfeda6e453ef145d8ac4cdc5971 Original-Change-Id: Ie7025e322fa0abc21367a520184a4c7741eba1e6 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://review.coreboot.org/c/31633 Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496824 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496824" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/24/1496824/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ib8f3659720548942441f150e304f2d91083556b6" commit="b362549b87dbd13592add7e298c3486e9e539408" commit_message="UPSTREAM: mb/google/hatch: Add GPIO programming for GPP_C0 to GPP_C7 coreboot did not program all GPIOs from C0 to C7 correctly which are SMBUS GPIO. Some of the GPIOs are left in default mode which is native function but we need to configure as GPIO mode and provide proper configuration as per schematic. After fixing GPIO, CSME power gating issue also gets fixed since SMBUS was not getting idle due to GPIO configuration and CSME was not getting power gated due to SMBUS. BUG=b:123702553 BRANCH=none TEST=Check on hatch board. CSME was not getting power gated for s0ix. After applying this patch CSME is power gated now Change-Id: Ib8f3659720548942441f150e304f2d91083556b6 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 64b82be3e3a7c6682b9b22b2ec5b5396f3e21512 Original-Change-Id: I5c6b9310dcc7bade0023abd5524781ce71df28be Original-Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.corp-partner.google.com> Original-Reviewed-on: https://review.coreboot.org/c/31640 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1496825 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496825" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/25/1496825/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Id6d0258afa670961d346f78d7c4d94026079b555" commit="10cb9ee53a85f4063435e62b0136dea1aed2bf16" commit_message="UPSTREAM: cpu/intel: Remove `socket_mPGA478` Doesn't look like it could be used. BUG=none BRANCH=none TEST=none Change-Id: Id6d0258afa670961d346f78d7c4d94026079b555 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 620e0f3f22059eae2c7ce0d272a3eca47a6c1de5 Original-Change-Id: I8074df12d062bd15f2388b367b3698c9d3b7b5b6 Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/c/31641 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/1496826 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496826" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/26/1496826/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I86c02e83067a4810bd43469e942b69c04ffc4bf4" commit="c0cbe7eefff9e23df6266e85630541101efe9800" commit_message="UPSTREAM: cpu/intel: Rename socket_mFCPGA478 to socket_m The name was wrong. mFCPGA478 is actually a pseudonym for mPGA478MN, the successor of the socket that was meant. The official name of this socket is mPGA478MT. But "Socket M" is much easier to distinguish. BUG=none BRANCH=none TEST=none Change-Id: I86c02e83067a4810bd43469e942b69c04ffc4bf4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 4829af17e3171da803532e9757100cc9f70d70ec Original-Change-Id: I4efeaca69acddfcdc5e957b0b521544314d46eeb Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/c/31642 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/1496827 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496827" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/27/1496827/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If23c5cef76cde3f80a48374139abca18ccf429a3" commit="4471395981fcb01ff9bb2934689909eb38e625c8" commit_message="UPSTREAM: cpu/intel/socket_m: Remove models 69x and 6dx These sneaked in and were never supported by this socket (nor expected in the notebooks that have it). BUG=none BRANCH=none TEST=none Change-Id: If23c5cef76cde3f80a48374139abca18ccf429a3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: ec6d07a3309cf55b806b4306efbddc811648ae90 Original-Change-Id: Iaeaf1d3bba213da56c7841cf6182e013626b8ca2 Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/c/31643 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/1496828 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496828" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/28/1496828/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I134910d0354bcf329034524d121e529c6289d93d" commit="9f1dd402502093ca3a1e42ec4837de72b9668ee8" commit_message="UPSTREAM: cpu/intel: Remove models 69x and 6dx These came for the Socket 479 which is not supported anymore. BUG=none BRANCH=none TEST=none Change-Id: I134910d0354bcf329034524d121e529c6289d93d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 1083a4d2324ce54f0a9f77098c8d7c23839c3849 Original-Change-Id: I0cf7ece028baa6750b79f54d615e93e452aff2e1 Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/c/31644 Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496829 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496829" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/29/1496829/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia0212b5cc352f5bd6d472c84bfc4cd8581dd8ac4" commit="0bdf7a81fed935c057ef55257793f17e420b7387" commit_message="UPSTREAM: cpu/intel: Rename socket_mPGA478MN to socket_p These marketing names are much easier to distinguish. My mnemonic: Socket M => up to Merom, Socket P => up to Penryn. BUG=none BRANCH=none TEST=none Change-Id: Ia0212b5cc352f5bd6d472c84bfc4cd8581dd8ac4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c570a0e713abbe03280b2da461106806c9366e48 Original-Change-Id: I3c2a59596cf7f3cd763bd79962ad326ab080677b Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/c/31645 Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496830 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496830" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/30/1496830/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I70b6855304c50305d8a204e3c7cf3468b9f427e1" commit="442ccf99553c1de89172e70453e9e5a5f1425474" commit_message="UPSTREAM: cpu/intel: Remove socket_BGA1284 Unused since the removal of `fsp_sandybridge`. BUG=none BRANCH=none TEST=none Change-Id: I70b6855304c50305d8a204e3c7cf3468b9f427e1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 08087a3e8af00e423fe8df02ac658fb6a1f31f45 Original-Change-Id: Iea31e341c3df680ed48db4f8734d9d0bde120be3 Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/c/31646 Original-Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496831 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496831" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/31/1496831/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0e3220b32fc7c6bddbb53a5317017105a0fca5f0" commit="ec3adaea0c7fa95f95313ea1d553be5707324ce8" commit_message="UPSTREAM: libpayload: cbfs: Require input size and output size for cbfs_decompress Currently, cbfs_decompress() calls ulzma() and ulz4f() for LZMA/LZ4 decompression. These two functions don't accept input/output size as parameters. We can make cbfs_decompress more robust by calling ulzman() and ulz4fn() instead. This could prevent us from overflowing destination buffer. BUG=none BRANCH=none TEST=boot into kernel on Kukui with COMPRESSED_PAYLOAD_LZMA / COMPRESSED_PAYLOAD_LZ4. Change-Id: I0e3220b32fc7c6bddbb53a5317017105a0fca5f0 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 5ec1d24974de8280a615047804bdfa73720777c8 Original-Change-Id: Ibe617825bd000ed618791d8e3c5f65bbbd5f7e33 Original-Signed-off-by: You-Cheng Syu <youcheng@google.com> Original-Reviewed-on: https://review.coreboot.org/c/31606 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496832 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496832" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/32/1496832/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I420062a9bc3fb5b4f33e9c9ef3a6140110be2d8a" commit="9c9c1abdb2ae765f751c2dc83ff032ffb9e967d0" commit_message="UPSTREAM: libpayload: cbfs: Check decompressed size when loading files After loading compressed files in CBFS, we should check the decompressed size is equal to the expected size. This might help us detect file content corruption or compressor/decompressor bugs. BUG=none BRANCH=none TEST=manually (we can still boot into kernel on Kukui, and verify that loading files from CBFS still works by seeing ChromiumOS firmware screen). Change-Id: I420062a9bc3fb5b4f33e9c9ef3a6140110be2d8a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c60c3269ec9d1bfcec2ec4f6fb450e9a59a0818e Original-Change-Id: Ia756cc5477670dd0d1d8aa59d4160ab4233c6795 Original-Signed-off-by: You-Cheng Syu <youcheng@google.com> Original-Reviewed-on: https://review.coreboot.org/c/31564 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496833 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496833" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/33/1496833/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I082c41d9670a72ad56fe0d94e893aa739e2e9004" commit="1ee39ee03770ebff40c23b62c8c279c0b7c57495" commit_message="UPSTREAM: cpu/x86/mtrr/mtrr.c:Avoid static scan false positive Static scan does not know the contents of the fixed MTRR descriptor, so it has no way to eval the result for variable num_ranges. If num_ranges is less or equal to 0, the for loop will not be entered, and the values of fixed_msrs will not be set. Asserting that num_ranges is greater than 0 ensures the loop enters at least once. BUG=b:112253891 TEST=build grunt Change-Id: I082c41d9670a72ad56fe0d94e893aa739e2e9004 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b28025a434cfb955a253a5b4d71e26e00f44a80d Original-Change-Id: Ieec0ac432c745bde4b1700539c266625da6cfd77 Original-Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Original-Reviewed-on: https://review.coreboot.org/c/31527 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/1496834 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496834" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/34/1496834/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Id7057ec082b185008c7711db574e959c3dafee12" commit="d226f07eb9478f061f1abb376a5a58e45ecf856b" commit_message="UPSTREAM: src/soc/intel/braswell/acpi/irqlinks.asl: Allow IRQ10 and 11 for all LNKx IRQ10 and 11 are not available as _PRS in all LNKx ResourceTemplates. These interrupt numbers are added to all LNKx. BUG=N/A TEST=Intel CherryHill CRB Change-Id: Id7057ec082b185008c7711db574e959c3dafee12 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 3e8504a325007cfbc6fdaa5e034ddea0657ee737 Original-Change-Id: Ie7a263d7d50f7f85e6195777c1429dcc27a15604 Original-Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Original-Reviewed-on: https://review.coreboot.org/c/29287 Original-Reviewed-by: Micha ygowski <michal.zygowski@3mdeb.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496835 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496835" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/35/1496835/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I9f332466dc161d20e1c221986a6c539545d2af97" commit="f5dcc9dd2d106f18630af5824c5243131b7d7f15" commit_message="UPSTREAM: soc/intel/braswell: Correct configuration of interrupts The level/edge mode of PIRQ is not configured and i8259 PIC not initialized. Add calls to: - i8259_configure_irq_trigger() - setup_i8259() - write_pci_config_irqs() to correct the configuration of interrupts. BUG=N/A TEST=Intel CherryHill CRB Change-Id: I9f332466dc161d20e1c221986a6c539545d2af97 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9348413c61b22300ce23baf4503825219249a5ad Original-Change-Id: I128cb35dd0e348a9cd9fb162651e0aa2b7e4a3ef Original-Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Original-Reviewed-on: https://review.coreboot.org/c/29419 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Micha ygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://chromium-review.googlesource.com/1496836 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496836" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/36/1496836/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iaa6b4dfe010c17a3c6bd286c0555441cde887200" commit="7d1f9da0081585b91c0f79efd40f8186a1502c0d" commit_message="UPSTREAM: src/soc/intel/braswell/southcluster.c: Config ISA DMA controller ISA dma controller is not configured. Add call isa_dma_init(). BUG=N/A TEST=Intel CherryHill CRB Change-Id: Iaa6b4dfe010c17a3c6bd286c0555441cde887200 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 255f35c2d222e4d7f45aada664284df4b7ed45e3 Original-Change-Id: Ib7af3f4ef6d6a29628bb2c27d32071be63ff6af2 Original-Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Original-Reviewed-on: https://review.coreboot.org/c/29415 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Micha ygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://chromium-review.googlesource.com/1496837 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496837" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/37/1496837/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I4ccf4100fd16f4ec1ce682ce6ff64c25a9c8e8f4" commit="4905ab7fb2e84f1c4033f69efa5306fc515a366c" commit_message="UPSTREAM: mb/google/poppy/variants/atlas: Add tdp_pl1_override value Use 7w PL1 with DPTF throttle to enable better performance for atlas. BUG=b:113101335 BRANCH=None TEST=Recommend setting from thermal team. Build coreboot on atlas Change-Id: I4ccf4100fd16f4ec1ce682ce6ff64c25a9c8e8f4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 8997f67cf0e28e655cae084bc98dc91973e04657 Original-Change-Id: Idcf44f213259634a507a013b31b410ed322e9479 Original-Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Original-Reviewed-on: https://review.coreboot.org/c/31627 Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-by: Caveh Jalali <caveh@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496838 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496838" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/38/1496838/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5c7871a7f51f0664338c8bd679beea3be5d6a8a1" commit="ed964d4c860826143de4233bf2a2e06ff869bb34" commit_message="UPSTREAM: mb/google/poppy/variants/atlas: Update DPTF parameters Preliminary dptf change for Atlas - Throttle charger using all temp sensors (not just ambient) - Throttle charger with higher priority than CPU - Update throttle temperature using data from surface thermistor in thermal chamber test BUG=b:113101335 BRANCH=None TEST=based on preliminary data from thermal chamber test Change-Id: I5c7871a7f51f0664338c8bd679beea3be5d6a8a1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 805bd10eded9b553c7fe032f9a54874b29986c1c Original-Change-Id: Ic1ab72f569e8a4f7bffc5560518fb703d32f4b21 Original-Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Original-Reviewed-on: https://review.coreboot.org/c/31628 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/1496839 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496839" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/39/1496839/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I4c74c4b55958c5dcd38bd36dc81cd7b29d55ad08" commit="346b17f4cc29d63d823a41fffa3bf032b9131f6f" commit_message="UPSTREAM: soc/intel/cannonlake: Add CometLake SoC support This patch adds SOC_INTEL_COMETLAKE Kconfig option. BUG=none BRANCH=none TEST=none Change-Id: I4c74c4b55958c5dcd38bd36dc81cd7b29d55ad08 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: fa011db6f0ede9073c993aff0be88ec2353cf926 Original-Change-Id: I2b0c269ade84d72cffaf59a0b53e0d6e3a84b835 Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/31282 Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496840 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496840" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/40/1496840/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I493559dc350a1f0ceb84ef4a5929a5e13e81a701" commit="4c1a2915c899d8067fc97876a9177d01610130d1" commit_message="UPSTREAM: src/soc/intel/braswell/northcluster.c: Correct calculation of FSP memory area Calculation of memory reserved by FSP is incorrect. Use CBMEM_ID_FSP_RESERVED_MEMORY to determine the memory area BUG=N/A TEST=Intel CherryHill CRB Change-Id: I493559dc350a1f0ceb84ef4a5929a5e13e81a701 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c6d672fe1dbfe9c07cea0c84aa2f512297e690ed Original-Change-Id: If68bda39ba2b1f3be4ed4bc872710be7bbd4948b Original-Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Original-Reviewed-on: https://review.coreboot.org/c/29333 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Micha ygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://chromium-review.googlesource.com/1496841 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496841" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/41/1496841/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I78c2132dd8ccdbd9c6863e4e208767edca47c782" commit="e85fcf68cd7e62769f96d08754aad7dc5281eb3f" commit_message="UPSTREAM: src/mb/sifive/hifive-unleashed: replace fdt in maskrom The fdt in the maskrom cannot be used to start linux. The correct fdt is dumped by replacing the bbl of the original firmware and used in coreboot. Correct the mac address in fdt by reading otp BUG=none BRANCH=none TEST=none Change-Id: I78c2132dd8ccdbd9c6863e4e208767edca47c782 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 411a8b7a6656ee62c3dee5c11285143ed6315215 Original-Change-Id: Ic29f0e590311360b85fafd12ebc36cd189fbbc38 Original-Signed-off-by: Xiang Wang <wxjstz@126.com> Original-Reviewed-on: https://review.coreboot.org/c/31047 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Original-Reviewed-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://chromium-review.googlesource.com/1496842 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496842" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/42/1496842/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Icce277136a23801223635aeec7df34520a2857d2" commit="dd92305446b50244f069d418eaf5546084524c76" commit_message="UPSTREAM: mb/google/sarien: ALC3204 HDA verb table pin config change On Sarien, change pin config of 0x19 (headset mic) and 0x21(headset headphone) to change jack location so that naming does not use "Front" in the name."Front Headphone" --> "Headphone" so it matches naming on Arcada. BUG=b:126334749 TEST= verify with 'evtest' command that jack name is "HDA Intel PCH Headphone" not "HDA Intel PCH Front Headphone" Change-Id: Icce277136a23801223635aeec7df34520a2857d2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: ddbdf9a0fb4ccd07fcfcc218a036236801089dc2 Original-Change-Id: I36ccf0c0a3952ab363fe6ee313fac8f0cce4dd61 Original-Signed-off-by: Joyce Toh <joyce.toh@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/31624 Original-Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Original-Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496843 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496843" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/43/1496843/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I37cd7e74c777c2f0503f743691d8e26619bc446d" commit="8d37932465048b46343046e9b02910303119bb60" commit_message="UPSTREAM: util/cbmem: Improve utility description BUG=none BRANCH=none TEST=none Change-Id: I37cd7e74c777c2f0503f743691d8e26619bc446d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a37a1a65a798655993bc41f8b8f1ade7a10fba68 Original-Change-Id: Ieddcf100d8db25f3ae9ac182cd374918e38d4f4c Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/31653 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/1496844 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496844" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/44/1496844/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2581d7fe5b4fdaa4d9af54e0ce966fdde6521620" commit="f3ed8423b680af03e2db8fb3926fad661aad24f9" commit_message="UPSTREAM: mb/siemens/mc_bdx1: Enable TPM2 on LPC This mainboard has a TPM located on the LPC bus. Enable the driver for it so that it is initialized and the ACPI table entry is generated. BUG=none BRANCH=none TEST=none Change-Id: I2581d7fe5b4fdaa4d9af54e0ce966fdde6521620 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 45e295b973a8ddff425d41f78c8fa8ccf6dc237f Original-Change-Id: I2eae63932658c2a9f752d28d7c08c27f48531360 Original-Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-on: https://review.coreboot.org/c/31663 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/1496845 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496845" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/45/1496845/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I529e6f18d27f50dd32f1fe9c35d04f68f713fb47" commit="3f3439eaaf0831a34e7db41956827fbe0dc20436" commit_message="UPSTREAM: drivers/intel/fsp2_0: Add more EFI return status into FSP2.0 driver This patch adds few more required EFI return status into FSP2.0 drivers so that coreboot code can make use of those. BUG=none BRANCH=none TEST=none Change-Id: I529e6f18d27f50dd32f1fe9c35d04f68f713fb47 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c3d03b3197dd5c582c18bcf7b9ececde130d07b3 Original-Change-Id: I9f040e7b9232b05dfc34971afa190cc3cbd7192a Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/31647 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1496846 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496846" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/46/1496846/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic80691077284f8d2756e29377fcd889962019e3d" commit="1add5f4b25e376fd69caf6d82c8c061ca40676e7" commit_message="UPSTREAM: ACPI: Rename FADT model and set it to zero INT_MODEL defined in ACPI 1.0 and renamed to reserved since V 2.0. The value for this field is zero but 1 is allowed to maintain compatibility with ACPI 1.0. So set this value to zero as we are using greater version than ACPI 1.0. BUG=none BRANCH=none TEST=none Change-Id: Ic80691077284f8d2756e29377fcd889962019e3d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 0d4de2a4771f2b88062dc4d14e9ddd4f00650741 Original-Change-Id: I910ead4e5618c958a7989f4c309a3a4bb938e31a Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/29986 Original-Reviewed-by: Martin Roth <martinroth@google.com> Original-Reviewed-by: David Guckian Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1496847 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496847" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/47/1496847/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I6ad5c5bd3dab4eaf5503ad1e462874c3dbde81fc" commit="bf226c49466ba9f96d1de3b2394536bfb2faa40a" commit_message="UPSTREAM: src/arch/x86/acpi.c: Update ACPI table's revision numbers BUG=none BRANCH=none TEST=none Change-Id: I6ad5c5bd3dab4eaf5503ad1e462874c3dbde81fc Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: f288b396bcbfee6181f225bf90906d1491004ced Original-Change-Id: I22020bd156536ee8f23a267d7c7b2d7af6c7cfeb Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/29579 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/1496848 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496848" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/48/1496848/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I15219d2483fcdeb878732bb2360509cb0605269b" commit="5a1c52cc88fdeb1adafa07a3e70791996872f808" commit_message="UPSTREAM: payloads/tianocore: Add option for custom bootsplash Add Kconfig options to use custom bootsplash file, dependent on using MrChromebox's stable branch, with help info conveying required file format. Adjust Makefile to copy the custom bootsplash and overwrite the default Logo.bmp file, handling both absolute and relative paths, and restore the original logo file after building so as to keep the working directory clean. Test: build with and without custom bootsplash, ensure correct bootsplash displayed BUG=none BRANCH=none TEST=none Change-Id: I15219d2483fcdeb878732bb2360509cb0605269b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: ff79341a807d1754dadeb2001ccd9769ef11a34b Original-Change-Id: I164f46777169801cff56633fd920bc81b7c8129a Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/31561 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://chromium-review.googlesource.com/1496849 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496849" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/49/1496849/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I024f989e7fb2b49a91aacc61075bb5733a1e7cd2" commit="1469c4b91fd5d3869936dbb61e87295eb2b6f74b" commit_message="UPSTREAM: soc/intel/skylake: Unify serial IRQ options We had two ways to configure the serial IRQ mode. One time in the devicetree for FSP and one time through Kconfig for coreboot. We'll use `enum serirq_mode` from soc/intel/common/ as a devicetree option instead. As the default is `quiet mode` here and that is the most common mode, this saves us a lot of lines. In four cases kblrvp8, 11 and librem 13v2, 15v3, we had conflicting settings in devicetree and Kconfig. We'll maintain the `continuous` selection, although it might be that coreboot overrode this earlier on the kblrvps. Note: A lot of Google boards have serial IRQ enabled, while the pin seems to be unconnected? BUG=none BRANCH=none TEST=none Change-Id: I024f989e7fb2b49a91aacc61075bb5733a1e7cd2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 44e89af6e609874f2f18d30f1e66dce8b5a98eff Original-Change-Id: I79f0cd302e335d8dcf8bf6bc32f3d40ca6713e5c Original-Signed-off-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-on: https://review.coreboot.org/c/31596 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1496850 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1496850" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/50/1496850/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I1604bb73b1a8ff49cf201e8e422bf870c13cf0a8" commit="62713bb1529ccda3cbc5e82f593ba5af747a55c2" commit_message="diagnostics: rename diagnosticsd to wilco_dtc_supportd Rename diagnosticsd to wilco_dtc_supportd since it does not manage diagnostics anymore. Rename diagnostics_processor to wilco_dtc (diagnostics and telemetry collector). BUG=b:124423615 TEST=build CQ-DEPEND=CL:1479610 CQ-DEPEND=CL:1491351 Change-Id: I1604bb73b1a8ff49cf201e8e422bf870c13cf0a8 Reviewed-on: https://chromium-review.googlesource.com/1479510 Commit-Ready: Polina Bondarenko <pbond@chromium.org> Tested-by: Polina Bondarenko <pbond@chromium.org> Reviewed-by: Maksim Ivanov <emaxx@chromium.org> " fail_count="4" gerrit_number="1479510" owner_email="pbond@chromium.org" pass_count="0" patch_number="6" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/10/1479510/6" remote="cros" total_fail_count="4"/><pending_commit branch="master" change_id="Ida64389a9c753e122fd68c90c1bc06854615bed4" commit="42286cef68e47be157c26679369c43a829a5ecb3" commit_message="wilco_dtc: rename diagnostics to wilco_dtc user and group BUG=b:124423615 TEST=build CQ-DEPEND=CL:1479610 CQ-DEPEND=CL:1479510 Change-Id: Ida64389a9c753e122fd68c90c1bc06854615bed4 Reviewed-on: https://chromium-review.googlesource.com/1491351 Commit-Ready: Polina Bondarenko <pbond@chromium.org> Tested-by: Polina Bondarenko <pbond@chromium.org> Reviewed-by: Maksim Ivanov <emaxx@chromium.org> Reviewed-by: Trent Begin <tbegin@chromium.org> " fail_count="3" gerrit_number="1491351" owner_email="pbond@chromium.org" pass_count="0" patch_number="2" project="chromiumos/overlays/eclass-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/eclass-overlay" ref="refs/changes/51/1491351/2" remote="cros" total_fail_count="4"/><pending_commit branch="master" change_id="I0f791cf3e191101d4282038ca551541984e76bf4" commit="e3d4c2b714fff1bbd1310967ed1c522767417d6e" commit_message="diagnostics: rename diagnosticsd to wilco_dtc_supportd The diagnosticsd does not manage diagnostics anymore and has to be renamed to wilco_dtc_supportd since it is used only for Wilco project interfaces. The renaming is planned to be done in several stages: Rename the daemons: diagnosticsd->wilco_dtc_supportd and diagnostics_processor -> wilco_dtc. Rename the source code namespaces/classes/objects. Rename interfaces. In scope of this CL only the diagnostics daemon and diagnostics_processor daemon are renamed to wilco_dtc_support daemon. Note: the occurrences of "diagnosticsd" and "diagnostics_processor" in comments will be fixed in scope of the following CLs. BUG=b:124423615 TEST=unittests CQ-DEPEND=CL:1491351 CQ-DEPEND=CL:1479510 Change-Id: I0f791cf3e191101d4282038ca551541984e76bf4 Reviewed-on: https://chromium-review.googlesource.com/1479610 Commit-Ready: Polina Bondarenko <pbond@chromium.org> Tested-by: Polina Bondarenko <pbond@chromium.org> Reviewed-by: Maksim Ivanov <emaxx@chromium.org> " fail_count="1" gerrit_number="1479610" owner_email="pbond@chromium.org" pass_count="0" patch_number="11" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/10/1479610/11" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I8efbe0d98910818ae40411e0d3864ca40ffccc99" commit="39a49c6d369dad84d9c58b4c05776d3b8c257d00" commit_message="crosvm: Exclude sys_util unit tests These tests already run as part of the dev-rust/sys_util package so there's no need to run them again here. This also sidesteps an issue where sys_util's fork tests fail under ASAN. BUG=chromium:937147 TEST=`USE=asan FEATURES=test emerge-$BOARD crosvm` Change-Id: I8efbe0d98910818ae40411e0d3864ca40ffccc99 Reviewed-on: https://chromium-review.googlesource.com/1495764 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Chirantan Ekbote <chirantan@chromium.org> Reviewed-by: Manoj Gupta <manojgupta@chromium.org> Reviewed-by: Dylan Reid <dgreid@chromium.org> " fail_count="1" gerrit_number="1495764" owner_email="chirantan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/64/1495764/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ic885efe0d5d61f609baa33332c8ba083e13c15f0" commit="78c00d7029343a7813324e52dbd4369715fd1c04" commit_message="crosvm: Skip io_jail tests under ASAN These tests fork, which causes the ASAN runtime to think there is a leak in the child process. Don't run them when building with ASAN. BUG=chromium:937147 TEST=`USE=asan FEATURES=test emerge-$BOARD crosvm` Change-Id: Ic885efe0d5d61f609baa33332c8ba083e13c15f0 Reviewed-on: https://chromium-review.googlesource.com/1495765 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Chirantan Ekbote <chirantan@chromium.org> Reviewed-by: Manoj Gupta <manojgupta@chromium.org> Reviewed-by: Dylan Reid <dgreid@chromium.org> " fail_count="1" gerrit_number="1495765" owner_email="chirantan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/65/1495765/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I4d4f92b640580e9927a2778dc7182a06abdd28ac" commit="9838a60c79011d7cf453530243244edd3406e894" commit_message="cros_sdk: drop --workspace option In the brillo days, we had separate workspaces for each product. But that concept is long dead and the code has (mostly) been deleted, so drop this command line flag too. We've actually already deleted support for this in src/scripts/ and nothing blew up, so clearly the bots are fine with it :). BUG=chromium:934975 TEST=precq passes Change-Id: I4d4f92b640580e9927a2778dc7182a06abdd28ac Reviewed-on: https://chromium-review.googlesource.com/1495839 Commit-Ready: Mike Frysinger <vapier@chromium.org> Tested-by: Mike Frysinger <vapier@chromium.org> Reviewed-by: Alex Klein <saklein@chromium.org> " fail_count="0" gerrit_number="1495839" owner_email="vapier@chromium.org" pass_count="0" patch_number="1" project="chromiumos/chromite" project_url="https://chromium-review.googlesource.com/chromiumos/chromite" ref="refs/changes/39/1495839/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I363063fa58c6a01afb4fc4eac4af6d82ed0769b2" commit="9720510f6a7068640d43c2a9f14e755b8900f1de" commit_message="dev-install: stop generating package.installable This files isn't needed on the board itself, and is now generated by the build_image script, so stop generating+installing the file. BUG=chromium:202477 TEST=precq passes CQ-DEPEND=CL:1484540 Change-Id: I363063fa58c6a01afb4fc4eac4af6d82ed0769b2 Reviewed-on: https://chromium-review.googlesource.com/1484694 Commit-Ready: Mike Frysinger <vapier@chromium.org> Tested-by: Mike Frysinger <vapier@chromium.org> Reviewed-by: Chris McDonald <cjmcdonald@chromium.org> " fail_count="3" gerrit_number="1484694" owner_email="vapier@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/94/1484694/1" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="Ia1d1037525a5b5f2341e336f12952ef433fbd520" commit="75db91903b999f9d16bd9933e84fe21e6e135680" commit_message="enter_chroot: drop --workspace_root support In the brillo days, we had separate workspaces for each product. But that concept is long dead and the code has (mostly) been deleted, so drop this command line flag too. BUG=chromium:934975 TEST=precq passes Change-Id: Ia1d1037525a5b5f2341e336f12952ef433fbd520 Reviewed-on: https://chromium-review.googlesource.com/1495916 Commit-Ready: Mike Frysinger <vapier@chromium.org> Tested-by: Mike Frysinger <vapier@chromium.org> Reviewed-by: Alex Klein <saklein@chromium.org> " fail_count="2" gerrit_number="1495916" owner_email="vapier@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/crosutils" project_url="https://chromium-review.googlesource.com/chromiumos/platform/crosutils" ref="refs/changes/16/1495916/1" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I894c3c48ff9f410ab019a2b1f205bace0e3fccf7" commit="2cb07848297ef22a5bf8d569d3c9e914a3bf5ce4" commit_message="inputtools: use LICENSE=BSD-Google BUG=chromium:348750 TEST=precq passes Change-Id: I894c3c48ff9f410ab019a2b1f205bace0e3fccf7 Reviewed-on: https://chromium-review.googlesource.com/1484699 Commit-Ready: Mike Frysinger <vapier@chromium.org> Tested-by: Mike Frysinger <vapier@chromium.org> Reviewed-by: Chung-yih Wang <cywang@chromium.org> " fail_count="1" gerrit_number="1484699" owner_email="vapier@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/99/1484699/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I3805c7d09b4b7dc346d93530e157482af4b094af" commit="bde3cbd5478de14e94514e2dc49338e97edd0326" commit_message="platform.MemoryPressure: use dynamic ports for WPR Change the ports used for WPR http and https connections from the fixed values 8080 and 8081 to dynamic values which guarantee (except for highly unlikely races) that the ports are not in use. BUG=chromium:934937 TEST=ran the test Change-Id: I3805c7d09b4b7dc346d93530e157482af4b094af Reviewed-on: https://chromium-review.googlesource.com/1494701 Commit-Ready: Luigi Semenzato <semenzato@chromium.org> Tested-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> " fail_count="2" gerrit_number="1494701" owner_email="semenzato@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/tast-tests" project_url="https://chromium-review.googlesource.com/chromiumos/platform/tast-tests" ref="refs/changes/01/1494701/3" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-3.10" change_id="Id921eb54b0d0dc367ceb5cb3348fd1429385a294" commit="804bbab9231ac9019660512349995a511c44b81e" commit_message="CHROMIUM: add oom kill count to /proc/vmstat This is a massively reduced backport of oom-kill counters in 4.14. This merely counts oom kill events globally and reports them in /proc/vmstat. The original patch is 8e675f7af50747e1e9e96538e8706767e4f80e2c. The functionality that we need (oom_kill field in /proc/vmstat) was added in 4.14. Link: http://lkml.kernel.org/r/149570810989.203600.9492483715840752937.stgit@buzz BUG=chromium:934937 TEST=verified /proc/vmstat content after OOM kill Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Change-Id: Id921eb54b0d0dc367ceb5cb3348fd1429385a294 Reviewed-on: https://chromium-review.googlesource.com/1495760 Commit-Ready: Luigi Semenzato <semenzato@chromium.org> Tested-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Reviewed-by: Yu Zhao <yuzhao@chromium.org> " fail_count="0" gerrit_number="1495760" owner_email="semenzato@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/60/1495760/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-3.14" change_id="Id921eb54b0d0dc367ceb5cb3348fd1429385a294" commit="dcefc69e65dd024e096ce3167bd594ba498830d1" commit_message="CHROMIUM: add oom kill count to /proc/vmstat This is a massively reduced backport of oom-kill counters in 4.14. This merely counts oom kill events globally and reports them in /proc/vmstat. The original patch is 8e675f7af50747e1e9e96538e8706767e4f80e2c. The functionality that we need (oom_kill field in /proc/vmstat) was added in 4.14. Link: http://lkml.kernel.org/r/149570810989.203600.9492483715840752937.stgit@buzz BUG=chromium:934937 TEST=verified /proc/vmstat content after OOM kill Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Change-Id: Id921eb54b0d0dc367ceb5cb3348fd1429385a294 Reviewed-on: https://chromium-review.googlesource.com/1495937 Commit-Ready: Luigi Semenzato <semenzato@chromium.org> Tested-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Reviewed-by: Yu Zhao <yuzhao@chromium.org> " fail_count="0" gerrit_number="1495937" owner_email="semenzato@chromium.org" pass_count="0" patch_number="3" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/37/1495937/3" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-3.18" change_id="Id921eb54b0d0dc367ceb5cb3348fd1429385a294" commit="e8847ae615d09d623cd12a05ba5bda1291b3889b" commit_message="CHROMIUM: add oom kill count to /proc/vmstat This is a massively reduced backport of oom-kill counters in 4.14. This merely counts oom kill events globally and reports them in /proc/vmstat. The original patch is 8e675f7af50747e1e9e96538e8706767e4f80e2c. The functionality that we need (oom_kill field in /proc/vmstat) was added in 4.14. Link: http://lkml.kernel.org/r/149570810989.203600.9492483715840752937.stgit@buzz BUG=chromium:934937 TEST=verified /proc/vmstat content after OOM kill Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Change-Id: Id921eb54b0d0dc367ceb5cb3348fd1429385a294 Reviewed-on: https://chromium-review.googlesource.com/1495761 Commit-Ready: Luigi Semenzato <semenzato@chromium.org> Tested-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> " fail_count="0" gerrit_number="1495761" owner_email="semenzato@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/61/1495761/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-3.8" change_id="Id921eb54b0d0dc367ceb5cb3348fd1429385a294" commit="4d405af2c17f39f85c17519b933d7d92163d1860" commit_message="CHROMIUM: add oom kill count to /proc/vmstat This is a massively reduced backport of oom-kill counters in 4.14. This merely counts oom kill events globally and reports them in /proc/vmstat. The original patch is 8e675f7af50747e1e9e96538e8706767e4f80e2c. The functionality that we need (oom_kill field in /proc/vmstat) was added in 4.14. Link: http://lkml.kernel.org/r/149570810989.203600.9492483715840752937.stgit@buzz BUG=chromium:934937 TEST=verified /proc/vmstat content after OOM kill Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Change-Id: Id921eb54b0d0dc367ceb5cb3348fd1429385a294 Reviewed-on: https://chromium-review.googlesource.com/1495759 Commit-Ready: Luigi Semenzato <semenzato@chromium.org> Tested-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Reviewed-by: Yu Zhao <yuzhao@chromium.org> " fail_count="0" gerrit_number="1495759" owner_email="semenzato@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/59/1495759/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Icffc3bf4935c88f308a5129c136e32ea0d6c9614" commit="778df44aee1f17ac3fc94c8de274b160f1d1bc6b" commit_message="user eclass: Ignore shell and homedir from portage-stable packages. These fields are provided by: profiles/base/accounts/user/* and don't need to be kept from portage-stable. CQ-DEPEND=CL:1490411,CL:1491946 BUG=chromium:935669,chromium:933582 TEST=sudo rm -rf /board/${BOARD} && ./setup_board --board=${BOARD} && ./build_packages --board=${BOARD} --skip_chroot_upgrade --nousepkg && build image, flash image, make sure ssh works. Change-Id: Icffc3bf4935c88f308a5129c136e32ea0d6c9614 Reviewed-on: https://chromium-review.googlesource.com/1487713 Commit-Ready: Allen Webb <allenwebb@google.com> Tested-by: Allen Webb <allenwebb@google.com> Reviewed-by: Mike Frysinger <vapier@chromium.org> " fail_count="2" gerrit_number="1487713" owner_email="allenwebb@google.com" pass_count="0" patch_number="8" project="chromiumos/overlays/eclass-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/eclass-overlay" ref="refs/changes/13/1487713/8" remote="cros" total_fail_count="4"/><pending_commit branch="master" change_id="I6dc6200762ed3fd45e7b00ebe506687905a28d19" commit="69dab55daa2c64473d5323adeeb0c3985d19d77a" commit_message="login: Use Minijail to launch Chrome. session_manager had a lot of bespoke process-launching logic for starting Chrome. Replace this with a straightforward Minijail invocation that removes a lot of duplicate code. Moreover, this will allow adding further sandboxing very easily. This CL does not change current sandboxing. Namely, we still: * Switch to user/group 'chronos' (1000), and inherit 'chronos' groups. * Close all fd's except for stdin/stdout/stderr. * For guest mode sessions, enter a new mount namespace. This CL is a net decrease of about 50 lines of code. Also re-add 'subprocess_test.cc' to the list of test targets which might have been dropped in the GN conversion. BUG=chromium:931255 TEST=New unit tests. TEST=Build and deploy to grunt, Guest mode works. Change-Id: I6dc6200762ed3fd45e7b00ebe506687905a28d19 Reviewed-on: https://chromium-review.googlesource.com/1464432 Commit-Ready: Jorge Lucangeli Obes <jorgelo@chromium.org> Tested-by: Jorge Lucangeli Obes <jorgelo@chromium.org> Reviewed-by: Jorge Lucangeli Obes <jorgelo@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org> " fail_count="11" gerrit_number="1464432" owner_email="jorgelo@chromium.org" pass_count="0" patch_number="8" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/32/1464432/8" remote="cros" total_fail_count="11"/><pending_commit branch="master" change_id="Ieaaa4ae47ef5585e47b705f98fc72a3a7553016f" commit="018be325bfcd5b8ff7af73117992af3c7296cbfc" commit_message="libbrillo: break SecureAllocator dependence on std::vector<uint8_t> This should break all unsafe usages of the SecureBlob (and ensure that all hell breaks loose). SecureVector is syntatic-sugar for now to simplify definitions. Eventually, SecureBlob and SecureVector should be equivalent. This commit breaks Chaps since it breaks the dependence between Blob and SecureBlob. CL:1357595 fixes that. BUG=chromium:728047 TEST=unittests. CQ-DEPEND=CL:1357595 Change-Id: Ieaaa4ae47ef5585e47b705f98fc72a3a7553016f Reviewed-on: https://chromium-review.googlesource.com/1340438 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Sarthak Kukreti <sarthakkukreti@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> " fail_count="1" gerrit_number="1340438" owner_email="sarthakkukreti@chromium.org" pass_count="0" patch_number="16" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/38/1340438/16" remote="cros" total_fail_count="6"/><pending_commit branch="master" change_id="I3ea75159a865e5f00ecef349725b3c12f94afaca" commit="9ba7693bd2cbc5be29b438f65880d9cde97223d7" commit_message="linux: rename function of device creation Rename functions and parameters that had 'virtio' in their names because we also create non-virtio devices like audio. BUG=none TEST=emerge-eve crosvm and deploy it to the device, verify some of devices are still created at /sys/bus/virtio/devices/ Change-Id: I3ea75159a865e5f00ecef349725b3c12f94afaca Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1480739 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: David Tolnay <dtolnay@chromium.org> Reviewed-by: Zach Reizner <zachr@chromium.org> " fail_count="2" gerrit_number="1480739" owner_email="jianxun.zhang@intel.com" pass_count="0" patch_number="4" project="chromiumos/platform/crosvm" project_url="https://chromium-review.googlesource.com/chromiumos/platform/crosvm" ref="refs/changes/39/1480739/4" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I20723f7622061472d3f838dce7fd1a06ff7cc81d" commit="031a36b99e30bb9b6315d64ca01542144d0080bf" commit_message="target-chromium-os-sdk: depend on minijail This paves the way for parse_seccomp_policy to be included in the SDK so that it can be used to test that policies compile in the CQ. TEST=precy passes BUG=chromium:936633 Change-Id: I20723f7622061472d3f838dce7fd1a06ff7cc81d Reviewed-on: https://chromium-review.googlesource.com/1493194 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Zach Reizner <zachr@chromium.org> Reviewed-by: Zach Reizner <zachr@chromium.org> " fail_count="1" gerrit_number="1493194" owner_email="zachr@chromium.org" pass_count="0" patch_number="3" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/94/1493194/3" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I3e012ba8a302b0838861c55d541d4d41eb64eab6" commit="7bbb9d981bada0893e634474524f130957f0b41d" commit_message="arc-setup: Remove unused IUSE I was trying to figure out which CrOS packages were ARC version specific, and found this IUSE entry very confusing. Let's just kill it. BUG=None TEST=emerge-$BOARD Change-Id: I3e012ba8a302b0838861c55d541d4d41eb64eab6 Reviewed-on: https://chromium-review.googlesource.com/1495763 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Yusuke Sato <yusukes@chromium.org> Reviewed-by: Hidehiko Abe <hidehiko@chromium.org> " fail_count="1" gerrit_number="1495763" owner_email="yusukes@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/63/1495763/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ie9a247d597be68b43d4779b3962428c35db34636" commit="7c3192a968c633453f17e52a5b5adb32b9c776d1" commit_message="shill: move private static of RoutingTable to unnamed namespace The private static constants and methods defined in the RoutingTable class are internal implementation details of RoutingTable and don't need to be exposed through the RoutingTable class definition. This CL moves them out of RoutingTable into an unnamed namespace defined in routing_table.cc. BUG=None TEST=Run unit tests. Change-Id: Ie9a247d597be68b43d4779b3962428c35db34636 Reviewed-on: https://chromium-review.googlesource.com/1495958 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Ben Chan <benchan@chromium.org> Reviewed-by: Alex Khouderchah <akhouderchah@chromium.org> " fail_count="1" gerrit_number="1495958" owner_email="benchan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/58/1495958/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I487fafc7ce60a435f2c98767e78ed3a85db15af9" commit="48b083d497d1b6e4b1e8057f8ba2d027cefb1ebf" commit_message="video.DecodeAccelJPEG: Added missing data for video.DecodeAccelJPEG Tast test. In http://crrev.com/c/1427457 new test data "pixel-1280x720-grayscale.jpg" was added, but this data was not added to Tast. This caused the DecodeAccelJPEG test to fail. TEST=DecodeAccelJPEG on nocturne BUG=chromium:937142 Change-Id: I487fafc7ce60a435f2c98767e78ed3a85db15af9 Reviewed-on: https://chromium-review.googlesource.com/1496179 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: David Staessens <dstaessens@chromium.org> Reviewed-by: Hirokazu Honda <hiroh@chromium.org> Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org> " fail_count="1" gerrit_number="1496179" owner_email="dstaessens@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/tast-tests" project_url="https://chromium-review.googlesource.com/chromiumos/platform/tast-tests" ref="refs/changes/79/1496179/2" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I9d97693e2beca1c9fec8c4f17bd3706b0ea8e795" commit="78024ecbf8243ca975823afe5378ae936937bd18" commit_message="ec: Cleanup ish config options Remove all ISH related CONFIG_* options except for: CONFIG_HOSTCMD_HECI: This will be used to enable the host command interface using HECI. Similar to CONFIG_HOSTCMD_LPC or CONFIG_HOSTCMD_ESPI. arcada_ish uses this config. CONFIG_HID_HECI: This will be used to enable a HID interface using HECI. It is compatible with the intel-ish-hid kernel driver. atlas_ish uses this config. Also remove ipc.c the functionality it has been superceded by ipc_heci.c. BUG=b:123634700 TEST=Built and tested on a arcada device Verified that atlas_ish builds BRANCH=none Change-Id: I9d97693e2beca1c9fec8c4f17bd3706b0ea8e795 Signed-off-by: Mathew King <mathewk@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1490551 Reviewed-by: Jett Rink <jettrink@chromium.org> " fail_count="0" gerrit_number="1490551" owner_email="mathewk@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/51/1490551/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I121d19106ee04fde833111ba9de87842bff7dfde" commit="be7e4ae6295fdd19e15431df6b42099b0260bab8" commit_message="cryptohome: Service method for LockToSingleUserMountUntilReboot added To implement security feature that would force the device to reboot after ARC session is over, Chrome will need to disable login until reboot of the device is done. This will be achieved by extending a PCR that is bound to cryptohome key. The method is added in the service to be available to be called from Chrome. The command line added in cryptohome is optional and used only for testing. BUG=chromium:812165 TEST=cryptohome --action=lock_to_single_user_mount_until_reboot --user=<email> CQ-DEPEND=CL:1458577 Change-Id: I121d19106ee04fde833111ba9de87842bff7dfde Reviewed-on: https://chromium-review.googlesource.com/958866 Commit-Ready: Igor <igorcov@chromium.org> Tested-by: Igor <igorcov@chromium.org> Reviewed-by: Igor <igorcov@chromium.org> Reviewed-by: Ryo Hashimoto <hashimoto@chromium.org> " fail_count="0" gerrit_number="958866" owner_email="igorcov@chromium.org" pass_count="0" patch_number="24" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/66/958866/24" remote="cros" total_fail_count="2"/><lkgm version="11851.0.0-rc3"/></manifest> |
