Cr50: I2CS: Set INT_AP_L as in input when the AP is off
INT_AP_L is used as a sync trigger to the host during i2cs
transactions. This signal is nominally set high and pulled up to
1.8V. However, when the AP is off, this line won't be pulled up which
would lead to excessive power draw by the Cr50 if this signal remains
driven high.
Added a change to set this signal as an input while the AP is powered
off. When the AP powers back up, it's changed back to an input and
driven high which is the default level.
BRANCH=none
BUG=chrome-os-partner:57733
TEST=manual
Change-Id: I12f175a7899eff6b90acb5a82282e526db3c1b9f
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/388799
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
diff --git a/board/cr50/board.c b/board/cr50/board.c
index 08274a6..3f36535 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -631,6 +631,31 @@
}
}
+void disable_int_ap_l(void)
+{
+ /*
+ * If I2C TPM is configured then the INT_AP_L signal is used as
+ * a low pulse trigger to sync I2C transactions with the
+ * host. By default Cr50 is driving this line high, but when the
+ * AP powers off, the 1.8V rail that it's pulled up to will be
+ * off and cause exessive power to be consumed by the Cr50. Set
+ * INT_AP_L as an input while the AP is powered off.
+ */
+ gpio_set_flags(GPIO_INT_AP_L, GPIO_INPUT);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, disable_int_ap_l, HOOK_PRIO_DEFAULT);
+
+void enable_int_ap_l(void)
+{
+ /*
+ * AP is powering up, set the I2C host sync signal to output and set
+ * it high which is the default level.
+ */
+ gpio_set_flags(GPIO_INT_AP_L, GPIO_OUT_HIGH);
+ gpio_set_level(GPIO_INT_AP_L, 1);
+}
+DECLARE_HOOK(HOOK_CHIPSET_RESUME, enable_int_ap_l, HOOK_PRIO_DEFAULT);
+
void system_init_board_properties(void)
{
uint32_t properties;
