Support wake sources for GPIO-caused wake and PCIE RP13-24
This change adds support for the following new wake sources in
eventlog:
1. PCIE wake on RP13-24
2. GPIO-caused wake
BUG=b:159947207
TEST=Verified with changes for zork that GPIO-caused wake is correctly
reported:
4 | 2020-08-17 17:36:01 | ACPI Enter | S3
5 | 2020-08-17 17:36:12 | ACPI Wake | S3
6 | 2020-08-17 17:36:12 | Wake Source | GPIO # | 4
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: Iaa7ef5a65df5ed2d8e497ff8a14b5556e10a238d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/mosys/+/2361027
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
diff --git a/include/lib/elog.h b/include/lib/elog.h
index 9f086a6..06a494a 100644
--- a/include/lib/elog.h
+++ b/include/lib/elog.h
@@ -198,6 +198,19 @@
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_2 0x1d
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_3 0x1e
#define ELOG_WAKE_SOURCE_PME_WIFI 0x1f
+#define ELOG_WAKE_SOURCE_PME_PCIE13 0x20
+#define ELOG_WAKE_SOURCE_PME_PCIE14 0x21
+#define ELOG_WAKE_SOURCE_PME_PCIE15 0x22
+#define ELOG_WAKE_SOURCE_PME_PCIE16 0x23
+#define ELOG_WAKE_SOURCE_PME_PCIE17 0x24
+#define ELOG_WAKE_SOURCE_PME_PCIE18 0x25
+#define ELOG_WAKE_SOURCE_PME_PCIE19 0x26
+#define ELOG_WAKE_SOURCE_PME_PCIE20 0x27
+#define ELOG_WAKE_SOURCE_PME_PCIE21 0x28
+#define ELOG_WAKE_SOURCE_PME_PCIE22 0x29
+#define ELOG_WAKE_SOURCE_PME_PCIE23 0x2a
+#define ELOG_WAKE_SOURCE_PME_PCIE24 0x2b
+#define ELOG_WAKE_SOURCE_GPIO 0x2c
struct elog_wake_source {
uint8_t source;
diff --git a/lib/eventlog/elog.c b/lib/eventlog/elog.c
index a036f01..ee4129c 100644
--- a/lib/eventlog/elog.c
+++ b/lib/eventlog/elog.c
@@ -259,6 +259,19 @@
{ ELOG_WAKE_SOURCE_PME_XHCI_USB_2, "PME - XHCI (USB 2.0 port)" },
{ ELOG_WAKE_SOURCE_PME_XHCI_USB_3, "PME - XHCI (USB 3.0 port)" },
{ ELOG_WAKE_SOURCE_PME_WIFI, "PME - WIFI" },
+ { ELOG_WAKE_SOURCE_PME_PCIE13, "PME - PCIE13" },
+ { ELOG_WAKE_SOURCE_PME_PCIE14, "PME - PCIE14" },
+ { ELOG_WAKE_SOURCE_PME_PCIE15, "PME - PCIE15" },
+ { ELOG_WAKE_SOURCE_PME_PCIE16, "PME - PCIE16" },
+ { ELOG_WAKE_SOURCE_PME_PCIE17, "PME - PCIE17" },
+ { ELOG_WAKE_SOURCE_PME_PCIE18, "PME - PCIE18" },
+ { ELOG_WAKE_SOURCE_PME_PCIE19, "PME - PCIE19" },
+ { ELOG_WAKE_SOURCE_PME_PCIE20, "PME - PCIE20" },
+ { ELOG_WAKE_SOURCE_PME_PCIE21, "PME - PCIE21" },
+ { ELOG_WAKE_SOURCE_PME_PCIE22, "PME - PCIE22" },
+ { ELOG_WAKE_SOURCE_PME_PCIE23, "PME - PCIE23" },
+ { ELOG_WAKE_SOURCE_PME_PCIE24, "PME - PCIE24" },
+ { ELOG_WAKE_SOURCE_GPIO, " GPIO #" },
{ 0, NULL },
};
static struct valstr ec_event_types[] = {
