nyan: Update the SPD info for Kitty
There are 2 kinds of 4GB Hynix memories for Kitty:
ramcode 1: H5TC8G63AMR-PBA
ramcode 3: H5TC8G63CMR-PBA
This patch updates the correct SPD info.
BUG=chrome-os-partner:49103
BRANCH=NONE
TEST=emerge-nyan_kitty mosys
Change-Id: I0c5defd15e9e6627b46ebfdabb9a96cebf8eb5a2
Signed-off-by: Kary Jin <karyj@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/358330
Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 423735a6cb8f1d19af8cff430940fbd4067b7f43)
Reviewed-on: https://chromium-review.googlesource.com/358732
Reviewed-by: Yomyung Leem <yungleem@chromium.org>
Commit-Queue: Kuen Liu <kuen.liu@quantatw.com>
diff --git a/platform/google/nyan/memory.c b/platform/google/nyan/memory.c
index e32f48b..59a08b2 100644
--- a/platform/google/nyan/memory.c
+++ b/platform/google/nyan/memory.c
@@ -481,7 +481,7 @@
case NYAN_KITTY:
if (ramcode == 0x0)
memory_config = HYNIX_DDR3_1600_2G;
- else if (ramcode == 0x1)
+ else if (ramcode == 0x1 || ramcode == 0x3)
memory_config = HYNIX_DDR3_1600_4G;
else
memory_config = MEM_UNKNOWN;
@@ -583,6 +583,13 @@
p[DDR3_SPD_REG_MODULE_PART_NUM_15] = 'B';
p[DDR3_SPD_REG_MODULE_PART_NUM_16] = 0;
p[DDR3_SPD_REG_MODULE_PART_NUM_17] = 0;
+ } else if (get_nyan_type(intf) == NYAN_KITTY) {
+ p[DDR3_SPD_REG_DENSITY_BANKS] = 0x05;
+ p[DDR3_SPD_REG_MODULE_PART_NUM_4] = '8';
+ p[DDR3_SPD_REG_MODULE_PART_NUM_9] = 'M';
+ p[DDR3_SPD_REG_MODULE_PART_NUM_14] = 'A';
+ if (get_ramcode(intf) == 0x3)
+ p[DDR3_SPD_REG_MODULE_PART_NUM_8] = 'C';
} else {
p[DDR3_SPD_REG_DENSITY_BANKS] = 0x05; /* 8 banks, 8Gb */
p[DDR3_SPD_REG_MODULE_PART_NUM_4] = '8';